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ISL9211A
Data Sheet April 2, 2009 FN6702.0
Charging System Safety Circuit
The ISL9211A is an integrated circuit (IC) optimized to provide a redundant safety protection to a Li-ion battery charging system. The IC monitors the input voltage, the battery voltage, and the charge current. When any of the three parameters exceeds its limit, the IC turns off an internal N-channel MOSFET to remove the power from the charging system to the battery. In addition to the above protected parameters, the IC also monitors its own internal temperature and turns off the N-channel MOSFET when the temperature exceeds +150C. Together with the battery charger IC and the protection module in a battery pack, the charging system using the ISL9211A has triple-level protection and is two-fault tolerant. The IC is designed to turn on the internal NFET slowly to avoid inrush current at power up but will turn off the NFET quickly when the input is overvoltage in order to remove the power before any damage occurs. The ISL9211A has a logic flag output to indicate a fault condition. The enable input allows the system to cut off the input power if needed.
Features
* 24V Max Input Voltage * Supports Up To 2.0A Input Current * Fully Integrated Protection Circuit for Three Protected Variables * High Accuracy Protection Thresholds * User Programmable Overcurrent Protection Threshold * Responds To Input Overvoltage in Less Than 1s * High Immunity of False Triggering Under Transients * Fault Indication for Various Fault Occurrence * Easy to Use * Pb-Free (RoHS Compliant)
Applications
* Cell Phones * Digital Still Cameras * PDAs and Smart Phones * Portable Instruments
Typical Application Circuit
INPUT VIN C1 OUT C2 ISL6292 BATTERY CHARGER
* Desktop Chargers
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" * Technical Brief TB379 "Thermal Characterization of Packaged Semiconductor Devices" * Technical Brief TB389 "PCB Land Pattern Design and Surface Mount Guidelines for QFN Packages"
ISL9211A
ILIM RILIM GND FAULT VB EN
RVB DISA ENA BATT PACK
Ordering Information
PART NUMBER PART MARKING TEMP RANGE (C) PACKAGE Tape & Reel PKG. (Pb-free) DWG. #
Pinout
ISL9211A (8 LD TDFN) TOP VIEW
VIN 1 GND 2 NC 3 FAULT 4 8 OUT 7 ILIM 6 VB 5 EN
ISL9211AIRU48XZ-T* 4XE ISL9211AIRU58XZ-T* 5XX ISL9211AIRU68XZ-T* 6XX
-40 to +85 8 Ld TDFN L8.2x2B -40 to +85 8 Ld TDFN L8.2x2B -40 to +85 8 Ld TDFN L8.2x2B
*Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pbfree products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2009. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
ISL9211A
Absolute Maximum Ratings
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 26V Output and VB Pin (OUT, VB) (Note 1) . . . . . . . . . . . . . . -0.3V to 8V Other Pins (ILIM, FAULT, EN) . . . . . . . . . . . . . . . . . . . -0.3V to 5.5V
Thermal Information
Thermal Resistance (Typical, Notes 2, 3) JA (C/W) JC (C/W) 8 Ld 2x2 TDFN Package . . . . . . . . . . 98 37 Maximum Junction Temperature (Plastic Package) . . . . . . . +150C Maximum Storage Temperature Range . . . . . . . . . .-65C to +150C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . .-40C to +85C Supply Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3V to 24V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
NOTES: 1. The maximum voltage rating for the VB pin under continuous operating conditions is 5.5V. All other pins are allowed to operate continuously at the absolute maximum ratings. 2. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See Tech Brief TB379. 3. For JC, the "case temp" location is the center of the exposed metal pad on the package underside. 4. Limits should be considered typical and are not production tested.
Electrical Specifications
PARAMETER POWER-ON RESET VIN Threshold
Pin Descriptions
Parameters with MIN and MAX limits are 100% tested at +25C, unless otherwise specified. Temperature limits are established by characterization and are not production tested. SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
VPOR
Rising Falling
2.20 -
80
2.47 1000 -
V V A A
VIN Bias Current
IVIN
RILIM = 24.9k, EN = L EN = H
PROTECTIONS Input Overvoltage Protection VOVP ISL9211ARU48 ISL9211ARU58 ISL9211ARU68 Input OVP Hysteresis Input OVP Falling Threshold ISL9211ARU48 ISL9211ARU58 ISL9211ARU68 Input OVP Response Time (Note 4) Overcurrent Protection Maximum Output Current Overcurrent Protection Blanking Time Battery Overvoltage Protection Threshold Battery OVP Threshold Hysteresis Battery OVP Blanking Time VB Pin Leakage Current Over-Temperature Protection Rising Threshold Over-Temperature Protection Falling Threshold LOGIC EN Input Logic HIGH 1.5 V BTBOVP VVB = 4.34V IOCP IMAX BTOCP VBOVP VVB = 3V, RILIM = 24.9k RILIM = 12.4k 4.6 5.6 6.6 4.55 5.55 6.55 0.93 4.25 4.8 5.8 6.8 100 1.0 2.0 180 4.34 30 180 150 110 5.0 6.0 7.0 1 1.07 4.40 20 V V V mV V V V s A A s V mV s nA C C
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ISL9211A
Electrical Specifications
PARAMETER EN Input Logic LOW EN Internal Pull Down Resistor FAULT Output Logic Low FAULT Output Logic High Leakage Current POWER MOSFET On-Resistance (Note 4) rDS(ON) Measured at 200mA 170 280 m Sink 5mA current Pin Voltage = 4.2V Parameters with MIN and MAX limits are 100% tested at +25C, unless otherwise specified. Temperature limits are established by characterization and are not production tested. (Continued) SYMBOL TEST CONDITIONS MIN TYP 200 0.4 MAX 0.4 0.8 1.5 UNITS V k V A
Pin Description
VIN (Pin 1)
The input power source. The VIN can withstand 24V input.
Typical Application
INPUT VIN C1 OUT C2 ISL6292 BATTERY CHARGER
GND (Pin 2 )
System ground reference.
NC (Pin 3)
No connection and must be left floating.
ISL9211A
ILIM RILIM GND FAULT VB EN
RVB DISA ENA BATT PACK
FAULT (Pin 4)
FAULT is an open-drain logic output that turns LOW when any protection event occurs.
EN (Pin 5)
IC enable pin. Pull this pin to LO to enable the device and pull it to HI to disable.
PART RILIM RVB C1,C2 24.9k 200k to 1M 1F/25V X5R ceramic capacitor DESCRIPTION
VB (Pin 6)
Battery voltage monitoring input. This pin is connected to the battery pack positive terminal via an isolation resistor.
ILIM (Pin 7)
Overcurrent protection threshold setting pin. Connect a resistor between this pin and GND to set the OCP threshold.
OUT (Pin 8)
Output pin.
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ISL9211A Block Diagram
IN P U T V IN Q1 Q2 POR P R E -R E G REF Q3 IL IM R IL IM CP2 EA OUT
IS L 6 2 9 2 BATTERY CHARGER
FET D R IV E R
R1
CP1 R2 1 .2 V Q4
L O G IC
0 .8 V CP3 R3 R4 VB R VB
FAULT
GND
EN
FIGURE 1. BLOCK DIAGRAM
Typical Operating Performance
VIN(2V/div) VIN (2V/DIV)
OUT (2V/DIV) OUT(2V/div)
The test conditions for the Typical Operating Performance are: VIN = 5V, TA = +25C, RILIM = 24.9k, RVB = 200k, Unless Otherwise Noted.
VIN (2V/DIV) VIN(2V/div)
OUT (2V/DIV) OUT(2V/div) LOAD CURRENT (200mA/DIV) Load Current(200mA/div)
FAULT (5V/DIV) Fault(5V/div)
TIME - 4ms/DIV
TIME - 20s/DIV
FIGURE 2. CAPTURED WAVEFORMS FOR POWER-UP. THE OUTPUT IS LOADED WITH A 10 RESISTOR
FIGURE 3. CAPTURED WAVEFORMS WHEN THE INPUT VOLTAGE STEPS FROM 5.5V TO 9.5V
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ISL9211A Typical Operating Performance
The test conditions for the Typical Operating Performance are: VIN = 5V, TA = +25C, RILIM = 24.9k, RVB = 200k, Unless Otherwise Noted. (Continued)
VIN (2V/DIV) VIN(2V/div)
VIN (2V/DIV) VIN(2V/div)
OUT (2V/DIV) OUT(2V/div)
OUT (2V/DIV) OUT(2V/div)
FAULT (5V/DIV) Fault(5V/div)
FAULT (5V/DIV) Fault(5V/div)
TIME - 2s/DIV
TIME - 4ms/DIV
FIGURE 4. CAPTURED WAVEFORMS WHEN THE INPUT GRADUALLY RISES TO THE INPUT OVERVOLTAGE THRESHOLD
FIGURE 5. TRANSIENT WHEN THE INPUT VOLTAGE STEPS FROM 6.5V TO 5.5V
VIN (5V/DIV) VIN(5V/div)
VIN (1V/DIV) VIN(1V/div) VB (1V/DIV) VB(1V/div)
OUT (2V/DIV) OUT(2V/div)
OUT (1V/DIV) OUT(1V/div)
FAULT (2V/DIV) Fault(2V/div)
FAULT (2V/DIV) Fault(2V/div)
TIME - 40s/DIV
TIME - 20s/DIV
FIGURE 6. TRANSIENT WAVEFORMS WHEN INPUT STEPS FROM 0V TO 9V
FIGURE 7. BATTERY OVERVOLTAGE PROTECTION. THE IC IS LATCHED OFF AFTER 16 COUNTS OF PROTECTION. VB VOLTAGE VARIES BETWEEN 4.3V TO 4.5V
VVIN(5V/div) IN (5V/DIV) LOAD CURRENT Load current (2A/div) (2A/DIV)
VIN (5V/DIV) VIN(5V/div)
Load current (2A/div)
LOAD CURRENT (2A/DIV)
FAULT (2V/DIV) Fault(2V/div)
FAULT (2V/DIV) Fault(2V/div
TIME - 40s/DIV
TIME - 1ms/DIV
FIGURE 8. POWER-UP WAVEFORMS WHEN OUTPUT IS SHORT-CIRCUITED
FIGURE 9. ZOOMED-IN VIEW OF FIGURE 8
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ISL9211A Typical Operating Performance
2.52 2.48 2.44 VPOR (V) 2.40 2.36 2.32 2.28 2.24 2.20 -50 -30 -10 10 30 50 70 90 5.60 -50 -30 -10 10 30 50 70 90 FALLING THRESHOLD 5.80 RISING THRESHOLD VOVP (V) 5.75 FALLING THRESHOLD RISING THRESHOLD
The test conditions for the Typical Operating Performance are: VIN = 5V, TA = +25C, RILIM = 24.9k, RVB = 200k, Unless Otherwise Noted. (Continued)
5.85
5.70
5.65
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 10. VPOR vs TEMPERATURE
FIGURE 11. INPUT OVERVOLTAGE PROTECTION vs TEMPERATURE
1.04 OVERCURRENT PROTECTION (A) 5.0V 1.03 ILIM PIN VOLTAGE (V) 1.02 1.01 1.00 0.99 0.98 0.97 0.96 0.95 -50 -30 -10 10 30 50 70 90 110 130 3.0V 4.3V
0.988 0.986 0.984 0.982 0.98 0.978 0.976 0.974 0.972 -50 -30 -10 10 30 50 70 90 110 130
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 12. OVERCURRENT PROTECTION vs TEMPERATURE AT VARIOUS INPUT VOLTAGES
FIGURE 13. ILIM PIN VOLTAGE vs TEMPERATURE
350 3.0V 300 250 rDS(ON) (m) 200 150 100 50 0 -50 -30 -10 10 30 50 70 90 110 130 5.0V 4.3V
TEMPERATURE (C)
FIGURE 14. ON-RESISTANCE vs TEMPERATURE AT DIFFERENT INPUT VOLTAGES
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ISL9211A Theory of Operation
The ISL9211A is an integrated circuit (IC) optimized to provide a redundant safety protection to a Li-ion battery from charging system failures. The IC monitors the input voltage, the battery voltage, and the charge current. When any of the above three parameters exceeds its limit, the IC turns off an internal N-channel MOSFET to remove the power from the charging system. In addition to the above protected parameters, the IC also monitors its own internal temperature and turns off the N-channel MOSFET when the temperature exceeds +150C. Together with the battery charger IC and the protection module in a battery pack, the charging system has triple-level protection from overcharging the Li-ion battery and is two-fault tolerant. The ISL9211A protects up to 26V input voltage. turned off permanently, as shown in Figure 7. Recycling the input power will reset the counter and restart the ISL9211A. The resistor between the VB pin and the battery, RVB, as shown in the Typical Applications circuit, is an important component. This resistor provides a current limit in case the VB pin is shorted to the input voltage under a failure mode. The VB pin leakage current under normal operation is negligible to allow a resistance of 200k to 1M be used.
Overcurrent Protection (OCP)
The current in the power NFET is limited to prevent charging the battery with an excessive current. The current is sensed using the voltage drop across the power FET after the it is turned on. The reference of the OCP is generated using a sensing FET Q2 (Mirror to Q1), as shown in Figure 1. The current in the sensing FET is forced to match the value programmed by the ILIM pin. The size of the power FET Q1 is 31,250 times the size of the sensing FET. Therefore, when the current in the power FET is 31,250 times the current in the sensing FET, the drain voltage of the power FET falls below that of the sensing FET. The comparator CP2 then outputs a signal to turn off the power FET. The OCP threshold can be calculated using Equation 1:
0.8V 25000 I LIM = --------------- 31250 = --------------R ILIM R ILIM (EQ. 1)
Power-Up
The ISL9211A has a power-on reset (POR) threshold of 2.47V (max). Before the input voltage reaches the POR threshold, the internal power NFET is off. Approximately 10ms after the input voltage exceeds the POR threshold, the IC resets itself and begins the soft-start. The 10ms delay allows any transients at the input during a hot insertion of the power supply to settle down before the IC starts to operate. The soft-start slowly turns on the power NFET to reduce the inrush current as well as the input voltage drop during the transition. The power-up sequence is illustrated in Figure 2.
Input Overvoltage Protection (OVP)
The input voltage is monitored by the comparator CP1 in the Block Diagram (Figure 1). CP1 has an accurate reference of 1.2V from the bandgap reference. The OVP threshold is set by the resistive divider consisting of R1 and R2. When the input voltage exceeds the threshold, the CP1 outputs a logic signal to turn off the power NFET within 1s (see Figure 3) to prevent the high input voltage from damaging the electronics in the handheld system. The hysteresis for the input OVP threshold is given in the "Electrical Specifications" table on page 2. When the input overvoltage condition is removed, the ISL9211A re-enables the output by running through the soft-start, as shown in Figure 5. Because of the 10ms second delay before the soft-start, the output is never enabled if the input rises above the OVP threshold quickly, as shown in Figure 6.
where the 0.8V is the regulated reference voltage at the ILIM pin. The OCP comparator CP2 has a built-in 180s delay to prevent false triggering by transient signals. The OCP function also has a 4-bit binary counter that accumulates during an OCP event. When the total count reaches 16, the power NFET is turned off permanently until the input power is recycled or the enable pin is toggled. Figures 8 and 9 illustrate the waveforms during the power-up when the output is shorted to ground.
Internal Over-Temperature Protection
The ISL9211A monitors its own internal temperature to prevent thermal failures. When the internal temperature reaches +150C, the IC turns off the N-channel power MOSFET. The IC does not resume operation until the internal temperature drops below +110C.
Fault Indication Output
The FAULT pin is an open-drain output that indicates a LOW signal when any of the three fault events happens. This provides a signal to the microprocessor to take further action to enhance the safety of the charging system.
Battery Overvoltage Protection
The battery voltage OVP is realized with the VB pin. The comparator CP3, as shown in Figure 1, monitors the VB pin and issues an overvoltage signal when the battery voltage exceeds the 4.34V battery OVP threshold. The threshold has 30mV built-in hysteresis. The comparator CP3 has a built-in 180s blanking time to prevent any transient voltage from triggering the OVP. If the OVP situation still exists after the blanking time, the power NFET is turned off. The control logic contains a 4-bit binary counter that if the battery overvoltage event occurs 16 times, the power NFET is 7
Applications Information
The ISL9211A is designed to meet the "Lithium-Safe" criteria when operating together with a qualified Li-ion battery charger. The "Lithium-Safe" criteria requires the charger output to fall within the green region shown in Figure 15 under normal operating conditions and NOT to fall in the red region when there is a single fault in the charging system.
FN6702.0 April 2, 2009
ISL9211A
Taking into account the safety circuit in a Li-ion battery pack, the charging system is allowed to have two faults without creating hazardous conditions for the battery cell. The output of the Li-ion charger, such as the ISL6292C, has a typical I-V curve shown with the blue lines under normal operation, which is within the green region. The function of the ISL9211A is to add a redundant protection layer such that, under any single fault condition, the charging system output does not exceed the I-V limits shown with the red lines. As a result, the charging system adopting the ISL9211A and the ISL6292C chip set can easily pass the "Lithium-Safe" criteria test procedures. The ISL9211A is a simple device that requires only three external components, in addition to the ISL6292 charger circuit, to meet the "Lithium-Safe" criteria, as shown in the "Typical Application Circuit" on page 1. The selection of the current limit resistor RILIM is given in the Overcurrent Protection section.
1000 ISL9211A LIMITS ISL6292C LIMITS
CHARGE CURRENT (mA) 0
1
2
3
4
5
6
BATTERY VOLTAGE (V)
FIGURE 15. LITHIUM-SAFE OPERATING REGIONS
Capacitor Selection
The input capacitor (C1 in the "Typical Application Circuit" on page 1) is for decoupling. Higher value reduces the voltage drop or the over-shoot during transients. Two scenarios can cause the input voltage over-shoot. The first one is when the AC adapter is inserted live (hot insertion) and the second one is when the current in the power NFET of the ISL9211A has a step-down change. Figure 16 shows an equivalent circuit for the ISL9211A input. The cable between the AC/DC converter output and the handheld system input has a parasitic inductor. The parasitic resistor is the lumped sum of various components, such as the cable, the adapter output capacitor ESR, the connector contact resistance, and so on.
C1 L R C2
RVB Selection
The RVB prevents a large current from the VB pin to the battery terminal, in case the ISL9211A fails. The recommended value should be between 200k to 1M. With 200k resistance, the worst case current flowing from the VB pin to the charger output is shown in Equation 2, assuming the VB pin voltage is 24V under a failure mode and the battery voltage is 4.2V.
( 24V - 4.2V ) ( 200k ) = 99A (EQ. 2)
Such a small current can be easily absorbed by the bias current of other components in the handheld system. Increasing the RVB value reduces the worst case current, but at the same time increases the error for the 4.34V battery OVP threshold. The error of the battery OVP threshold is the original accuracy at the VB pin given in the "Electrical Specifications" table on page 2 plus the voltage built across the RVB by the VB pin leakage current. The VB pin leakage current is less than 20nA, as given in the "Electrical Specifications" table. With the 200k resistor, the worst-case additional error is 4mV and with a 1M resistor, the worst-case additional error is 20mV.
AC/DC
ISL9211A
ADAPTER
CABLE
HANDHELD SYSTEM
FIGURE 16. EQUIVALENT CIRCUIT FOR THE ISL9211A INPUT
During the load current step-down transient, the energy stored in the parasitic inductor is used to charge the input decoupling capacitor C2. The ISL9211A is designed to turn off the power NFET slowly during the OCP and the battery OVP event. Because of such design, the input over-shoot during those events is not significant. During an input OVP, however, the NFET is turned in less than 1s and can lead to significant over-shoot. Higher capacitance reduces the over-shoot.
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ISL9211A
The over-shoot caused by a hot insertion is not very dependent on the decoupling capacitance value. Especially when ceramic type capacitors are used for decoupling. In theory, the over-shoot can rise up to twice of the DC output voltage of the AC adapter. The actual peak voltage is dependent on the damping factor that is mainly determined by the parasitic resistance (R in Figure 16). In practice, the input decoupling capacitor is recommended to use a 25V, X5R dielectric ceramic capacitor with a value between 0.1F to 1F. The output of the ISL9211A and the input of the charging circuit typically share one decoupling capacitor. The selection of that capacitor is mainly determined by the requirement of the charging circuit. When using the ISL6292 family chargers, a 1F, 6.3V, X5R capacitor is recommended.
Layout Recommendation
The ISL9211A uses a thermal-enhanced TDFN package with an exposed thermal pad at the bottom of the package. The layout should include as much copper as possible beneath the exposed pad on the component layer to improve thermal performance. The exposed pad under the package should be connected to the ground plane electrically as well as thermally. The vias should be about 0.3mm to 0.33mm in diameter, use as many vias as possible to fit in the epad area.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 9
FN6702.0 April 2, 2009
ISL9211A
Package Outline Drawing
L8.2x2B
8 LEAD MICRO THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE (TDFN) WITH E-PAD Rev 0, 04/08
2.00 A 6 PIN 1 INDEX AREA B 6 PIN #1 INDEX AREA 8 0.50 1.600.050 EXP. DAP 2.00 1
(4X)
0.15 0.10 M C A B 0.250.050 0.900.050 EXP. DAP ( 8x0.30 )
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
( 8x0.20 ) PACKAGE OUTLINE ( 8x0.30 ) 0 . 55 MAX
0.10 BASE PLANE
C
C
SEATING PLANE ( 6x0.50 )
SIDE VIEW
0.08
C
1.60
2.00
C
0 . 2 REF
( 8x0.25 )
0.90 2.00 0 . 00 MIN. 0 . 05 MAX.
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal 0.05 4. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 indentifier may be either a mold or mark feature.
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